Synchronized stroboscopic display system and apparatus

ABSTRACT

An improved apparatus is provided for the display of analog information on a readable scale, for the instantaneous display of a variety of alpha-numeric characters and symbols, and for the conversion of analog information into digital data. In one embodiment of the apparatus, the data is stored on a rapidly moving information carrier, such as an endless belt. A synchronizing pulse signal is generated once for each cycle of rotation of the carrier, and this signal triggers the start of a timing interval whose length is controlled by a time delay circuit. The time delay circuit, in turn, responds to an input analog signal, or other variable. At the end of the timing interval, a circuit momentarily fires a light-emitting diode which illuminates the particular character or symbol on the carrier which is positioned in front of the light-emitting diode at the instant of firing. In a second embodiment analog quantities are measured by mounting the light-emitting diode on a movable carrier, such as a disc, which rotates in conjunction with a fixed scale, and by momentarily firing the light-emitting diode at a controlled angular position for each cycle by control circuitry, such as described above.

United States Patent [191 Wayne [451 Apr. 10, 1973 [54] SYNCHRONIZED STROBOSCOPIC DISPLAY SYSTEM AND APPARATUS [75] Inventor: Ronald G. Wayne, Las Vegas, Nev.

[73] Assignee: Ettie Bogod, Las Vegas, Nev.

[22] Filed: Apr. 7, 1972 [21] Appl. No.: 241,918

Related US. Application Data [63] Continuation-impart of Ser. No. 96,566, Dec. 9,

1970, abandoned.

[52] US. Cl. ..340/324 R, 315/129, 324/99 D, 340/378 B [51] Int. Cl. ..G08b 5/38 [58] Field of Search ..'..178/30; 340/324 R,

340/378 R, 378 A, 378 B; 315/129; 324/99 D l/1972 Chang Miller et a1. 178/30 X ..340/378 B ABSTRACT An improved apparatus is provided for the display of analog information on a readable scale, for the instantaneous display of a variety of alpha-numeric characters and symbols, and for the conversion of analog information into digital data. In one embodiment of the apparatus, the data is stored on a rapidly moving information carrier, such as an endless belt. A synchronizing pulse signal is generated once for each cycle of rotation of the carrier, and this signal triggers the start of a timing interval whose length is controlled by a time delay circuit. The time delay circuit, in turn, responds to an input analog signal, or other variable. At the end of the timing interval, a circuit momentari- 1y fires a light-emitting diode which illuminates the particular character or symbol on the carrier which is positioned in front of the light-emitting diode at the instant of firing. In a second embodiment analog quantities are measured by mounting the light-emitting diode on a movable carrier, such as a disc, which rotates in conjunction with a fixed scale, and by momentarily firing the light-emitting diode at a controlled angular position for each cycle by control circuitry, such as described above.

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SHEET 5 OF 7 Wu H M mu m w \F ww rw Nu my m m em? 7 QW MW AHNQ wwu v QM PATENTED APR 1 0 ms SHEET 7 [IF 7 SYNCHRONIZED STROBOSCOPIC DISPLAY SYSTEM AND APPARATUS This application is a continuation-in-part of copending Application Ser. No. 96,566 which was filed Dec. 9, 1970, now abandoned.

BACKGROUND OF THE INVENTION The invention relates to improved apparatus for utilizing the principles of stroboscopic action for the display of information in the form of alpha-numeric characters, and for the measurement of electrical analog variables with extremely fast response and high accuracy. For example, and as mentioned above, lightemitting diodes may be used as the illuminating source, since such diodes may be operated at rates of the order of 100 microsecond flash time without the need for any shutter mechanism. Such a flash time permits the medium to move at a rate, for example, of up to 360 inches per second and still maintain the display within an acceptable smear range.

In the apparatus to be described, as long as the timing interval established by the time delay circuit remains constant, the same character on the belt is illuminated, thus creating the impression of a stationary image display. Different characters on the belt can be selectively displayed by varying the duration of the timing interval, as mentioned above, by a change in input analog signal. A simultaneous display of a multiplicity of characters is also possible by incorporating an array of light-emitting diodes into the apparatus, with each light-emitting diode of the array being controlled by its own time delay circuit. Moreover, in an alternate version of the invention, the position of a calibrated display scale with respect to a fixed indicating marker can be controlled by a similar type of time delay circuit, whereby the length of the timing interval is a function of the input electrical analog information.

During recent years, the ever increasing use of high speed electronic computers and computer related equipment has been accompanied by the need for the instantaneous display of the computed information in a form easily recognized and easily interpreted by the human eye. A wide variety of different types of apparatus have been used in the prior art to accomplish this purpose.

One frequently used system in the prior art incorporates a plurality of multiple-filament tubes, in which each filament has the shape of a numerical character, and wherein one of ten filaments, for example, is selectively illuminated for displaying different digits. Each tube, commonly known as Nixie-tube, is controlled by eleven wires, one for each numerical character plus one for a common return. Each character position requires a separate Nixie tube. Thus, for example, an eight-digit numerical display would require eight tubes, plus 88 control wires and appropriate decoding circuitry.

Another system for instantaneously displaying a variety of characters includes the use of a photo-diode matrix, in which the image of each character is created by selectively illuminating a sequence of dots arranged in an array of rows and columns. Commonly, an array of 35 dots in seven rows and five columns is used in such prior art apparatus to create a large variety of alphabetic, numeric, and punctuation characters. Each character position in such prior art apparatus is controlled by twelve interface wires, five for the columns and seven for the rows. In such apparatus, one row after the other is scanned in rapid sequence and the dots corresponding to the intersections of appropriate rows and columns are selectively illuminated, so that the combination of the selected dots forms the desired character image. Such prior art apparatus permits a wider choice of characters than the apparatus described above which uses Nixie tubes. However, the latter apparatus requires at least twleve wire connections for each character position, and it also requires a complex sequential decoding circuitry.

A third prior art system for displaying images of characters involves a cathode-ray tube. In this latter apparatus, the electron beam of the cathode-ray tube is deflected at a high rate of speed and it scans a phosphorized viewing screen containing a multiplicity of small storage elements. Each small storage element represents the dot of an image, the dot being illuminated when electrically excited. The principle of operation of the various typesof cathode-ray tubes is well known and will not be described in detail herein. It suffices to mention that cathode-ray tubes which are used as character display devices are much more expensive and require more complex control circuitry than the devices used in the other prior art apparatus discussed briefly above.

Yet another prior art system for the instantaneous display of multiple characters involves the use of a rotating cylinder which has rings of character markings extending around its circumference adjacent one another, with one complete ring of characters being provided for each character position to be displayed. For example, if there are ten character positions, and if each position can display 10 different numerals, then character markings are required on the cylinder surface. Each ring of character marking has an associated light source which flashes once per revolution, illuminating one of the characters. The flash repetition rate and the duration of each flash are such that the appearance of a stationary character is produced. The selection of the character to be illuminated is made by an electronic counter. The flash of light is energized when the count of a train of pulses coincides with the count of a number stored in an associated register of a computer. Therefore, in such prior art apparatus, each character position requires a separate pulse counter and storage register.

In addition to the instantaneous character display systems and apparatus of the prior art, such as' described above, there are various prior art indicating devices which display the magnitude of an electrical quantity by moving a pointer across a calibrated scale. All of these measuring or indicating devices, such as galvanometers, contain moving mechanisl elements which are expected to respond to subtle or instantaneous variations in the magnitude of the applied electrical quantity. However, bearing friction, mechanical inertia, and other inherent limitations of mechanical devices set a definite restriction on the accuracy and speed of response of such measuring or indicating devices.

The apparatus of the present invention is advantageous when compared with the apparatus and system of the prior art, such as described above, in that the apparatus and system of the invention utilizes simpler and less expensive means for selecting the images of characters to be displayed, and in that the apparatus of the invention requires but only two interface wire connections for each character position, and it provides essentially instantaneous and accurate response to variations in the applied electrical analog information. The apparatus of the invention is also advantageous in that it requires only one image marking on the information carrier for each of a plurality of characters to be displayed, regardless of the number of character positions.

Other objects, features and advantages of the invention will become more apparent upon reference to the following detailed description taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective diagrammatic representation showing the essential elements of one embodiment of the system embodying the concepts of the present inwhich may be used in the embodiment of FIG. 1;

FIG. 5 is a timing diagram of a time delay circuit which is used in conjunction with the system and apparatus of the invention;

FIG. 6 is a schematic diagram of another electric circuit which may be used in the control of the embodiment of FIG. 1;

FIG. 7 is a circuit diagram of a power supply circuit for use in conjunction with the circuit of FIG. 6

FIG. 8 is a diagrammatic representation of a display embodying the concepts of a second embodiment of the invention; and

FIGS. 9 and 10 are diagrams of circuits which may be used to control the display of FIG. 8.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS Referring now to the drawings, wherein like characters designate like or corresponding parts, there is illustrated in FIG. 1 a diagrammatic view of apparatus used in one embodiment of the present invention. In the embodiment of FIG. 1, the information carrier is a flexible belt 10, which is driven by a drive pulley 12 at a uniform speed, and which is supported by two auxiliary idler pulleys 14. The drive pulley 12 is mounted on the shaft of a synchronous electric motor 16 rotating, for example, at a speed ofv 900 rpm. The flexible belt 10 is generally opaque, as shown in FIG. 2, except for transparent or translucent areas constituting a line synchronizer 24a, a multiplicity of character synchronizers 24b, a plurality of characters and symbolts 26, and a sequence of appropriately numbered lines 28 (FIG. 1) representing the calibrated graduations of a numbered scale.

The illustration of FIG. 2 shows a fragmentary view of the information carrier belt 10, wherein all the opaque areas are shown cross-hatched and .allthe translucent or transparent areas are shown white. The desired shapes of an unlimited variety of characters 26 to be displayed can easily be produced on the flexible belt 10 by common photographic processes. Moreover, the belt 10 with one set of characters 26 can easily be removed from the pulley l2 and quickly exchanged for another belt with a difi'erent set of character markings to serve a different application.

On the inside of the loop of the belt 10, there is positioned a synchronizing light source 20, opposite a synchronizing photoelectric transducer 22 at the outside of the loop. Along a different portion of the belt 10, and inside of the loop, one or several light-emitting diodes 30 are mounted on a mounting board 32. Each light-emitting diode 30 is connected to a time delay cir cuit assembly 34. Opposite the set of light-emitting diodes 30, outside of the loop, there is a viewing screen 36 upon which the illuminated characters and symbols 26, or the calibrated and numbered scale graduations 28 appear to the viewer. In the application in which the apparatus is used as an analog read-out or measuring device, the viewing screen'36 also includes a reference line 38, upon which the calibrated and numbered scale graduations 28 are projected.

The following is a brief description of the fundamental theoretical principles which are utilized in the embodiment of the present invention shown in FIG. 1. First, the operation of the apparatus of the invention as an analog read-out device will be explained.

The principle of stroboscopic action is well known in the field of electronic and scientific instrumentation. Basically, this principle takes advantage of the persistence of human vision. When a rapidly rotating body, or a pulley driven belt, is illuminated by an intermittently flashing light source, and when the repetition rate of the short flashes of light correspond to the cycling rate of the rotating body (or of the moving endless belt), then the appearance of a stationary image is produced.

Furthermore, if a moving endlessbelt, such as the belt 10, illuminated in the aforementioned manner, carries the numbered scale graduations 28 along its entire length, and if the intermittent short flashes of light occur with a definite phase relation with respect to the line synchronizer 240, a certain numbered graduation 28 of the scale is illuminated and can be aligned with respect to the stationary reference line 38 on the screen. Whenever the phase relation between the flashing light source and the line synchronizer 24a is changed, representing a different input analog quantity, another numbered scale graduation 28 is illuminated along the reference line 38. The apparatus and system of the present invention thuspresents a read-out of the input analog quantity, and this is achieved by use of a relatively simple time delay circuit to control the phase relationship between the flashof light and th line synchronizer 24a.

The action of the common resistance-capacitance circuit is familiar to all those skilled in the art of electronic circuitry. When a voltage step function is applied to a series combination of a resistor and a capacitor,

the voltage across the capacitor rises at a rate much 1 lower than the rise rate of the applied voltage step function. The rate of the rise of the voltage across the capacitor depends on the R-C time constant of the resistance-capacitance circuit and upon the amplitude of the applied voltage step. Thus, 7 the time interval between the initial step and the instant the voltage across the capacitor reaches a given predetermined amplitude level can be controlled by varying either the magnitude of the resistance in the resistancecapacitance combination, or by varying the amplitude of the voltage step function.

Referring now to the diagram of FIG. 3, a plurality of time delay circuits, each shown in block form as 34, are connected to respective ones of the light-emitting diodes 30. The time delay circuits 34 are all connected to the output of the synchronizing photocell 22 by means of a lead 40, and the time delay circuits are individually controlled by controlling the resistance of the individual input circuits, or the voltage levels on their respective input leads 42.

Once during each cycle of rotation of the belt 10, the line synchronizer 24a, which is in the form of a translucent slit in the belt 10, passes between the synchronizing light source 20 and the synchronizing pick-up photoelectric transducer 22, causing a flash of light to impinge onto the photoelectric transducer. This causes the photoelectric transducer to generate a synchronizing pulse on the lead 40 which generates the start of the time delay interval (TD) for each of the time delay circuits 34. At the end of the time delay interval (TD), the corresponding light-emitting diode 30 is tired, and the portion of the belt opposite the light-emitting diode is illuminated for an instant.

It is apparent that the individual time delay circuits 34 may be used to indicate changes in amplitude of an electrical analog quantity, either voltage or resistance, and almost the entire length of the belt 10 can be used for the numbered graduations 28 of a continuous calibrated scale. The effective length of such a scale exceeds by far the practical limits of the scale of a conventional meter, such as of a galvanometer. The scale used in the present invention permits a reading accuracy and repeatability which is much better than the one of any other electrical analog measuring device. Moreover, once the belt 10 has been accelerated, an essentially instantaneous response to variations in the electrical input takes place, without the hunting, oscillation, or lag, experienced by mechanical pointers which are subject to the effects of mechanical inertia and friction.

Furthermore, and as shown in FIG. 3, several analog readings may be displayed side-by-side, by using two or more light-emitting diodes 30, each with its own time delay circuit 34. One scale may be used simultaneously for the different analog displays, or the length of the belt 10 may be sub-divided into two or more scales.

In addition to providing an improved apparatus for measuring electrical analog quantities, such as described above, the apparatus and system of the invention may also be used to provide an improved means for displaying alpha-numeric characters and symbols.

As shown in the fragmentary view of the belt 10 shown in FIG. 2, the line synchronizer 24a is provided character synchronizers 24b are disposed along the adjacent the top edge of the belt, and a multiplicity of used to control a suitable circuit to assure the illumination of the selected characters and symbols on the belt. The synchronizer 24a is designated as the line synchronizer, since it controls the start of the time delay interval for the entire line of characters and symbols; while the multiplicity of synchronizers 24b are designated as character synchronizers, since they' control the selection of the particular character or symbol to be illuminated.

A schematic circuit diagram for the time delay circuit 34 is shown in FIG. 4. In the circuit of FIG. 4, the synchronizing pulse lead 40 is connected to an input terminal which, in turn, is connected through a 1000 ohm resistor R11 to the gate electrode of a silicon controlled rectifier (SCR) Q4. The gate electrode of the SCR Q4 is also connected to a grounded 220 ohm resistor R12 which is shunted by a 0.0047 microfarad C6. The cathode of the SCR Q4 is grounded, and the anode is connected to a 3,000 ohm resistor R2.

The circuit of FIG. 4 also includes a further silicon controlled rectifier (SCR) Q3 whose gate electrode is connected through a 1,000 ohm resistor R9 to the collector of a PNP transistor Q2. The transistor Q2 may be of the type designated 2N4l25. The gate electrode of the SCR Q3 is also connected to a grounded 220 ohm resistor R10 which is shunted by a 0.0047 microfarad capacitor C5. The cathode of the SCR Q3 is grounded, and the anode is connected to a 1500 ohm resistor R1. The resistor R1 is shunted by a 0.0047 mic'rofarad capacitor C1, and the resistor R2 is shunted by a 0.0047 microfarad capacitor C2. The capacitors C1 and C2 are connected to a 0.2 microfarad capacitor C3. The resistors R1 and R2, and the capacitors C1 and C2 are connected to a lead 102. The lead 102 is connected through a pair of normally closed contacts of a relay K1 to thepositive terminal of a +28V regulated voltage source through a diode CR1. The diode CR1 may be of the type designated 1N400l. The cathode of the diode CR1 is also connected to a grounded capacitor C4 which may have a capacity of 100 microfarads.

The anode of the SCR Q3 is connected through a diode CR8 and through a 6,800 ohm resistor R15 to the base of a PNP transistor Q7. The transistor Q7 may be of the type designated 2N4l25. The collector of the SCR Q4 is connected through a diode CR9 and through a 6,000 ohm resistor R16 to the base of the transistor Q7, and the base of the transistor is further connected to the lead 102 through a 500 ohm potentiometer R17.

The emitter of the transistor Q7 is directly connected to the lead 102, and the collector is connected through the energizing coil of the relay K1 to ground. The energizing coil of the relay K1 is shunted by a 0.5 microfarad capacitor C8. The anode of the SCR Q4 is also connected to the base of a PNP transistor Q1 through a 27 ohm resistor R6. The transistor Q1 may be of the type presently designated 2N4l25.

The base of the transistor Q1 is also connected through a 220 ohm resistor R3 to the lead 102. The emitter of the transistor Q1 is connected through a pair of diodes CR2 and CR4 to the lead 102, and the collector is connected to an input terminal designated C. A second input terminal designated H is connected through a 25 kilo-ohm potentiometer R8 to the-gate electrode of a unijunction transistor Q which may be of the type designated 2N2160. The gate electrode is also connected to a grounded capacitor C7 having a capacity of the order of .3 microfarads. The source electrode of the transistor Q5 is connected to a grounded 220 ohm resistor R14 and to a 100 ohm resistor R13. The resistor R13 is connected to the base of an NPN transistor Q6, which may be of the type designated 2N4910. The drain electrode of the transistor Q5 is connected through a 470 ohm resistor R7 to the lead 102.

The emitter of the transistor Q6 is connected through a pair of diodes CR6 and CR7 to ground, and the collector is connected to an output terminal designated J. A further output terminal designated B is connected to the junction of a ohm resistor R4 and a 1,500 ohm resistor R5. The light-emitting diode is connected across the output terminals B-J; The resistor R4 is connected to the lead 102, and the resistor R5 is connected to the base of the PNP transistor Q2. The emitter of the transistor Q2 is connected to the lead 102 through a pair of diodes CR3 and CR5.

In the operation of the circuit of FIG. 4 when a synchronizing pulse (FIG. 5(A)) received over the lead 40 is applied to the point A, it results in the triggering of the SCR Q4 which, in turn, switches on the transistor Q1, and causes it to become conductive. The switching action of the transistor Q1 has the effect of applying a voltage step (FIG. 5(8)) to the collector at the point designated 8 corresponding to the input terminal C, the amplitude of the voltage step closely approximating the voltage level C of the lead 102 (FIG. 5(C))-. At this instant, the charging of the capacitor C7 is initiated, and the voltage level at the point D begins to rise (FIG. 5(D)). The rate of rise of the voltage level of the point D is controlled by the input resistance designed R): connected across the input terminals C and H.

When the voltage level at the point D has reached the regulated voltage level of the point B, the unijunction transistor Q5 is turned on, causing the capacitor C7 to discharge, and at the same time firing the lightemitting diode 30 connected across the terminals B and J due to the switching action of the transistor Q6. At the instant of firing, the feedback connection through the collector of the transistor Q2 triggers the silicon controlled rectifier Q3 and cuts off the silicon rectifier Q4. Thus, the circuit is reset to its quiescent state, until the next synchronizing pulse appears on the lead 40, so as to initiate the next time delay interval TD. As the light-emitting diode 30 is fired, it illuminates the particular numbered calibration 28, for example, which is disposed in front of the corresponding diode 30 at that particular instant.

In order to protect the circuit of FIG. 4 from the effects of double firing of the SCR Q4, the relay K1 is included in the circuit. Diodes CR8 and CR9 sense the conductance of Q3 and Q4 respectively. If both SCRs are conductingsimultaneously (a double-fire), resistors R15 and R16 supply a summing current to the base Q7 sufficient to turn on Q7, and K1 opens the power supply causing the circuit to reset.

It will be appreciated that the circuit of FIG. 4 operates in conjunction with the line synchronizer 24a in FIGS. 1 and 2, and that the control is such that the time interval TD (FIG. 5) is initiated each time the line synchronizer is detected and the time delay interval TD is terminated a predetermined time thereafter, deter mined by the analog value applied across the terminal C-H, as represented by variations in the value of the resistance R For the display of alpha-numeric characters such as shown in FIGS. 1 and 2, the character synchronizers 24b are detected, and these character synchronizers are used to cause the time delay circuit 34 of FIG. 4 to fire the light-emitting diode 30 at the detection of the particular character synchronizer 24b following the time in FIG. 5 at which the curve D reaches the amplitude of the curve B. This may be achieved, for example, by inserting an and" gate in the gate electrode circuit of the unijunction transistor Q5, and by applying the detected character synchronizers 24b to the and gate, together with the potential at the point D. In this way, the unijunction transistor Q5 is rendered conductive at the time of the character synchronizer following the time in FIG. 5 at which the curve D reaches the amplitude of the curve B. This control is described in more detail in conjunction with FIG. 6.

The use of the character synchronizers 24b assures that the corresponding light-emitting diode 30 will be illuminated at the exact instant a selected character isin position in front of it, rather than between characters, as could occur without the precise synchronization provided by the use of the character synchronizers 24b. It will be appreciated, of course, that the character synchronizers are detected by a circuit and elements similar to the elements 20 and 22 in FIG. 1 which are used to detect the line synchronizer 24a.

The circuit of FIG. 6 responds to a variable voltage input to establish the time delay of the time delay circuit, the variable voltage input being characterized as the character selection voltage input" in FIG. 6, and which is applied to an input terminal 200. As in the previous instance, the start of each cycle is established by a synchronizing pulse from the information carrier 10, designated the line synchronizer 24a which is applied to an input terminal 202. As also described, and as shown in FIG. 2, each character and symbol 26 along the carrier 10 is accompanied by a marker on a different level from the line synchronizer and these latter markers have been referred to as the character synchronizers" 24b, these being sensed by a separate marker detector.

More specifically, and assuming that the information carrier 10 is provided with 64 characters 26, covering all the letters of the alphabet, plus all numbers and punctuation marks, the symbols to be displayed are positioned on the center area of the carrier 10, as shown in FIG. 2, with the line synchronizer 240 which defines the start of a new cycle appearing at the leading edge of the space above the characters, as shown, while the character synchronizers 24b occupy the area below the characters. The character synchronizers 24b are applied to an input terminal 204 of. the circuit of FIG. 6.

The circuit of FIG. 6 includes a series of silicon controlled rectifiers Q50, Q60 and Q70. The cathodes of the silicon controlled rectifiers are all connected to a common line designated b, and which is connected to the negative terminal of the power supply circuit to be described in conjunction with FIG. 7. The anodes of the silicon controlled rectifiers are connected through respective resistors R130, R140 and R150 to a lead designated 13+, and which is connected to one of the positive output terminals of the power supply of FIG. 7. The resistors are shunted by respective capacitors C90, C100 and C110. In addition the anodes are intercoupled by capacitors C120 and C130, as shown.

The input terminal 202 is connected through resistors R100 and R90 to the gate electrode of the silicon controlled rectifier Q50, the gate being connected through a resistor R190 to the lead B, the resistor R190 being shunted by a capacitor C50. The resistor R100 is shunted by a capacitor C160. The input terminal 204, on the other hand, is connected through a resistor R120 and through a resistor R10 to a diode CR120. The resistor R120 is shunted by a capacitor C170. The cathode of the diode CR120 is connected to a capacitor C150 which, in turn, is connected to the gate of the silicon controlled rectifier Q70. The latter gate is connected to the lead B- through a resistor R210, the resistor being shunted by a capacitor C70. The junction of the diode CR120 and the capacitor C150 is connected to a resistor R180 which, in turn, is connected to the anode of the silicon controlled rectifier Q60. The light-emitting diode 30 is connected to the lead 8+, and its cathode is connected through a resistor R160 and through a resistor R170 to the anode of the silicon controlled rectifier Q70. The resistor R170 is shunted by a capacitor C140.

The character selection voltage input terminal 200, on the other hand is connected to a resistor R360 which, in turn, is connected to a potentiometer R230. The resistor R360 may have a resistance of the order of 1,000 ohms, whereas the potentiometer may have a resistance of 1 megohm. The potentiometer is connected to a 100 kilo-ohm resistor R250 which, in turn, is connected to the lead B. The potentiometer R230 and resistor R250 are shunted by a Zener diode CR5 1.

The anode of thesilicon controlled rectifier Q50 is connected through a diode CR60 and through a resistor R220 to the base of a PNP transistor Q90. The emitter of the transistor Q90 is connected to a resistor R30 and through a diode CR30 to an input terminal designated B-l|, and which is connected to a similarly designated terminal of the power supply to be described in conjunction with FIG. 7. The emitter of the transistor Q90 is connected to a capacitor C180 which, in turn, is connected to the lead B. The capacitor C180 is shunted by a Zener diode CR50.

The junction of the potentiometer R230 and resistor R250 is connected through a resistor R240 to the gate electrode of a field effect transistor 0100. The field effect transistor may be of the type designated 2N3820. The gate electrode of the field effect transistor is con-' nected to the cathode of a diode CR70, the anode of which is connected to the lead B. The diode CR70 may be of the type designated IN4148. The source electrode of the field efiect transistor 0100 is connected to the lead B, and the drain electrode is connected through a potentiometer R270 and through a resistor R260 to a common lead 206 connected to the collector of the transistor 090. The resistor R260 is shunted by a capacitor C190.

The junction of the resistor R260 and potentiometer R270 is connected to the base of a PNP transistor Q80.

The emitter of the transistor Q is connected through diodes C and C80 to the lead 206. The collector of the transistor Q80 is connected through a resistor R80 to the gate of a silicon controlled rectifier 0110. The gate is connected through a resistor R290 to the lead B, and the resistor R290 is shunted by a capacitor C200. The cathode of the silicon controlled rectifier is directly connected to the lead B. The anode of the silicon controlled rectifier, on the other hand, is connected through resistors R300 and R130 to the lead 206, the resistor R300 being shunted by a capacitor C210.

The junction of the resistors R300 and R310 is connected to a resistor R320 to the base of a PNP transistor Q120. The emitter of the transistor 0120 is connected through diodes CR110 and CR to the lead 206. The collector of the transistor 0120 is connected to the lead B- to a resistor R340, and through resistors R330 and R350 to the gate of the silicon controlled rectifier Q60. The resistor R350 is shunted by a capacitor C220. The gate of the silicon controlled rectifier Q60 is connected to the lead B- through a resistor R200, the resistor being shunted by a capacitor C60. The cathode of the silicon controlled rectifier Q60 is directly connected to the lead B.

In the operation of the circuit of FIG. 6, it will be appreciated that the start of each cycle of the belt 10, the line synchronizer 24a triggers the silicon controlled rectifier Q50 into conduction by way of the network R9, R100, C160, at which point the transistor Q90 becomes conductive thereby energizing the time delay circuit 34. As mentioned above, the circuit of FIG. 6 is a voltage sensing circuit, and any particular character is selected for display by applying a particular corresponding voltage to the input terminal 200. In the time delay circuit, the field effect transistor 0100 is electrically conductive between its drain and source electrodes until a positive-going voltage appears at its gate.

Thus, if no voltage is available at the input terminal 200, the time constant formed by the field effect transistor 0100 and the potentiometer 270 (as the resistance element), and by the capacitor C 190 (as the capacitance element), will be very short. This constitutes the pedestal time delay of the circuit. Under this condition, the silicon controlled rectifier Q fires very shortly after the line synchronizer 24a has caused the transistor Q90 to become conductive. The firing of the silicon controlled rectifier Ql10, producing a corresponding pulse from the transistor 0120, then triggers the silicon controlled rectifier Q60 into conduction, by way of the network R330, R350, and C220. The firing of the silicon controlled rectifier Q60 causes the silicon controlled rectifier Q5 to become non-conductive by means of the communicating action of the capacitor C120. The resulting non-conduction of the silicon controlled rectifier 050 causes the transistor Q90 to become non-conductive, thereby de-activating the time delay circuit.

When the silicon controlled rectifier Q60 is rendered conductive, the network R110, R and C170, through the diode CR120, becomes immediately sensitive to the character synchronizers 24b. Therefore, the very next character synchronizer received by the input terminal 204 will trigger the silicon controlled rectifier Q70 into conduction, and provide a firing current spike for the light-emitting diode 30. Since no voltage was presumed present at the character selection voltage input for the conditions described above, and as a result, only the pedestal type delay occurred before the circuit became sensitive to the character synchronizers 24b, so that the first character synchronizer 24b in the chain caused the light-emitting diode 30 to flash. Under these conditions, the first marker would define a blank position with no character present, and therefore no flash would be apparent to the observer. Once the silicon controlled rectifier Q70 has been triggered, it .remains conductive until the complete cycle of the belt brings the line synchronizer 24 into action, so that the corresponding pulse supplied to the input terminal 202 triggers the silicon controlled rectifier Q50 and resets the silicon controlled rectifier 070 through the capacitors C120 and C130.

The circuit of FIG. 6 may conveniently be set to a character selection voltage sensitivity of 500 millivolts per character. Then, for example, 0.5 volts applied to the input terminal 200 would select the character of FIG. 2; 1.0 volts would select the character l 1.5 volts would select the character 2", and so on. With such a progression, an input selecting voltage, for example, of 7.0 volts applied to the input terminal 200 would select the fourteenth character space, occupied in the representation of FIG. 2 by the symbol X. At the input of 7.0 volts, for example, a time delay is established in the time delay circuit 34 sufficient for the information carrier belt to travel to a point nearly a full character space prior to the fourteenth character synchronizer 24a. Thus, thirteen carrier synchronizers would appear at the input terminal 204 before the silicon controlled rectifier Q60 was finally triggered by the time delay circuit 34. Since the silicon controlled rectifier 070 may not be triggered until the silicon controlled rectifier Q60 is conductive, none of the 13 character synchronizers 24b would cause the lightemitting diode 30 to flash. However, with the silicon controlled rectifier Q60 rendered conductive, the 14 character synchronizer would then fire the lightemitting diode 30 to illuminate the space of the X sym- 4 bol.

Since it is the selected character synchronizer 24b, and not the output from the time delay circuit 34, which actually fires the light-emitting diode 30, then any character selection input voltage from, for example, 7.0 to 7.49 volts would cause the space of the X symbol to be flashed, without any apparent lateral displacement. Thus, by use of the character synchronizers, all characters displayed are locked into true center regardless of slight variations in the input selecting voltage.

The tolerance of the system to voltage drifts, given in percentage of maximum character voltage, is based entirely upon the number of characters in the chain. That is, if the information carrier contains only numerals, such as I through 0 in ten spaces, the selecting voltage range of 10 percent of maximum allowing a drift of :35 percent from nominal before a wrong character will appear. If there are forty characters total, then each selecting voltage band is only 2.5 percent of total, and correspondingly allows a tolerance of only 21.25 percent drift beyond nominal.

side, and forming separate character positions, as

described above, it is intended that only a single line synchronizer detector and a single character synchronizer detector be used, with the two detectors providing synchronization data for all the character position control circuits simultaneously. Then, since each character position in such a system is at a different distance from the line synchronizer trigger point, and since it is mandatory that the same voltage be applied to the different character position control circuits in the display of the same character, each character position control must have an independently adjustable pedestal, and this is provided by adjusting the potentiometer R270.

An appropriate power supply and system start delay circuit is shown in FIG. 7. In FIG. 7, a plug 300 is connected through a fuse 302 and through a switch 304 to the primary winding of a power transformer T1. The plug 300 is intended to be plugged into the usual l 17- volt alternating current receptacle, and it supplies single phase alternating current voltage to the primary of the transformer T1. The plug also serves to supply an exciting alternating current voltage to the synchronous drive motor 16. a

The secondary of the transformer T1 is connected to a diode bridge circuit which is made up of diodes CR1, CR2, CR3 and CR4 connected as shown. The bridge network is connected through a 500 ohm resistor R1 to a lead 306, and the bridge network is also connected to a lead 308. A 250 micro-microfarad capacitor C1 is connected across the leads 306 and 308, as is a 750 ohm resistor R2 and Zener diode CR5. The lead 306 is connected to the collectors of a pair of NPN transistors Q1 and Q2. The base of the transistor O2 is connected to the junction of the resistor R2 and Zener diode CR5, the base of the transistor 01 is connected to the emitter of the transistor Q2, and the emitter of the transistor Q1 is connected to the output terminal B-H- of the power supply. A 250 micro-microfarad capacitor C2 is connected between the terminal 8-H- and the lead 308.

The emitter of the transistor Q1 is also connected through a diode CR6 and through a resistor R3 to a lead 310 extending to the output terminal B-F of the power supply. A regulated voltage of, for example, 24- volts DC appears across the output terminals 8+ and B-- of the power supply. A capacitor C3 of 200 micromicrofarads is connected between the leads 310 and 308. A unijunction transistor 03, which may be of the type designated 2N2l60 is included in the system start delay circuit, as is a silicon controlled rectifier Q6. The lead 308 is connected to the base of the silicon controlled rectifier Q6, and the anode of the silicon controlled rectifier is connected to the output terminal B- The gate electrode of the unijunction transistor Q3 is connected to a capacitor C4 which, in turn, is connected to the lead 308, and to an 83 kilo-ohm resistor R6 which is connected to the lead 310. The gate of the unijunction transistor O3 is also connected to the negative terminal B through a diode CR7 and through a l,000 ohm resistor R9. The source electrode of the unijunction transistor Q3 is connected to the gate of the silicon controlled rectifier Q6, and the drain electrode is connected through a 570 ohm resistor R7 to the lead 310. The gate electrode of the silicon controlled rectifier Q6 is connected through a 100 ohm resistor R2 to the lead 308, the resistor being shunted by a 0.01 microfarad capacitor C5.

The various components of the power supply are known to the art, as is the power supply circuit. The power supply rectifies the input alternating current voltage, and produces a regulated direct current voltage across its output terminals, all in a manner well understood by the art. The start delay circuit prevents the electronics from functioning after initial turn-on, until the synchronous drive motor 16 has attained optimum speed. At turn-on, the silicon controlled rectifier Q6 is non-conductive, thus rendering inoperative all circuits attached to its anode. The unijunction transistor O3 is connected directly across the power supply output, and it becomes active immediately upon the closing of the main switch 304.

AFter a fixed time delay, as established by the resistance-capacitance network R6, C4, which may, for example, be approximately 3 seconds after the main switch 304 has been closed, the unijunction transistor Q3 goes conductive and thereby provides a trigger pulse to the gate of the silicon controlled rectifier Q6. The silicon controlled rectifier is then fired, so as to activate the remainder of the circuitry of the system. The diode CR7 operating in series with the resistor R9 then clamps the emitter of the unijunction transistor Q3 to a nearly grounded potential, by way of the anode circuit of the silicon controlled rectifier Q6, thereby preventing the unijunction transistor Q3 from again becoming conductive until the main switch 304 has been opened, and subsequently closed.

In a second embodiment of the invention, and as shown schematically in FIG. 8, a disc 400 is mounted on the drive shaft of the synchronous drive motor 16 to be rotated thereby in a counterclockwise direction. The light-emitting diode 30 is mounted on the disc, as shown. A stationary scale is provided around the periphery of the disc, and the scale may be calibrated, for example, from to 100, or any other calibrations may be used. In the embodiment of FIG. 8, a voltmeter is provided, for example, in that the timed flashing of the light-emitting diode 30 as it is rotated by the disc 400 around the stationary scale is made to correspond to the value of an applied input analog voltage, so that the diode is momentarily illuminated as it lines up with a particular calibration of the stationary scale corresponding to the input voltage. Likewise, the control of the light-emitting diode 30 may be in accordance with a variable resistance, or other analog input, with the calibrations of the stationary scale providing the corresponding reading.

In the embodiment of FIG. 8 a ceramic magnet 402, or its equivalent, is mounted on the disc 400, and this magnet passes a first reed switch 404 for each revolution of the disc to close the switch and produce a synchronizing marker at the terminal 406. Likewise, the magnet 402 passes an end of time (E.O.T.) reed switch 408 to provide an E.O.T. marker at an output terminal 410. The synchronizing marker at the terminal 406, and the E.O.T. marker at the terminal 410, are each in the form of a sharp positive pulse, as the reed switches 404 and 408 selectively connected the respective terminals to the positive 24-volt terminal of the power supply of FIG. 7 for an instant each time the magnet passes the corresponding reed switches.

As described, therefore, the disc 400 carries the light-emitting diode 30 in a uniform rotary motion behind the fixed analog scale which is forrned on the front panel of the instrument. The magnet 402 is mounted at from the light-emitting diode 30, and it is by means of this magnet operating in conjunction with the reed switches 404 and 408, which are placed in appropriate proximity to the periphery of the rotating disc, that the synchronizing/reset register, to be described, is able to maintain synchronism between the physical phase angle of the light-emitting diode 30 and the associated time delay and firing circuit shown, for example, in

FIG. 9. It will be noted in the diagram of FIG. 8, that 1 the light-emitting diode 30 is precisely at the sync point simultaneously with the point at which the magnet 402 closes the synchronizing reed switch 404.

As shown in FIG. 9, the synchronizing marker terminal 406 is connected through a 22 kiloohm resistor R422 and through a 470 ohm resistor R420 to the gate of a silicon controlled rectifier 45 of the firing circuit for the light-emitting diode 30. The base of the silicon controlled rectifier Q45 is connected to a lead 500 which, in turn, is connected to the negative terminal B- of the power supply of FIG. 7. The gate of the silicon controlled rectifier Q45 is connected to the lead 500 through a 220 ohm resistor R413 which is shunted by a 0.01 microfarad capacitor C410. The resistor R422 is shunted by a 0.047 microfarad microfarad capacitor C47.

The E.O.T. marker terminal 410 is connected to a reset lead 502 in FIG. 9 which, in turn, is connected through a diode CR49 and through a ohm resistor R421 to a 0.1 microfarad capacitor C421. The capacitor C421 is connected to the gate of a silicon controlled rectifier Q47. The silicon controlled rectifiers used in the firing circuit may be of the type designated 2N444l.The base of the silicon controlled rectifier Q47 is connected to the lead 500, and the gate is connected to the lead 500 through a 100 ohm resistor R415. The resistor R415 is shunted by a 0.047 microfarad capacitor C41 1.

The anode of the silicon controlled rectifier Q45 is connected through a 1,500 ohm resistor R44 to the terminal B+ of the power supply of FIG. 7, and the anode is coupled through a 0.22 microfarad capacitor C414 to the anode of a further silicon controlled rectifier Q44. The latter anode is connected through a 1,500 ohm resistor R43 to the positive terminal B+, the resistor being shunted by a 0.0047 microfarad capacitor C412. The resistor R44, on the other hand, is shunted by a 0.0047 microfarad capacitor C413.

The cathode of the silicon controlled rectifier Q44 is connected to the 8- lead 500, and the gate is connected through a 270 ohm resistor R412 to that lead, the resistor being shunted by a 0.01 microfarad capacitor C49. The gate is also connected to a 470 ohm resistor R416 which, in turn, is connected to the reset lead 502 through a 22 kilo-ohm resistor R419 and through a diode CR49. The resistor is shunted by a 0.047 microfarad capacitor C46.

The anode of the silicon controlled rectifier Q45 is also connected to a 4,700 ohm resistor R414 which, in turn, is connected to the capacitor C44. The anode is also connected through a 1,500 ohm resistor R436 to the base of a PNP transistor Q49 in the resistance control time delay circuit 34 which forms a part of the circuit of FIG. 9. The anode of the silicon controlled rectifier 45 is connected to the resistor R436 through a diode CR41 1.

The anode of the silicon controlled rectifier Q47 is connected through a 22 kilo-ohm resistor R416 to the light-emitting diode 30 on the disc of FIG. 8. The resistor R416 is shunted by a capacitor C415. The lightemitting diode 30 is also connected through a 2 ohm resistor R417 to the power supply terminal B+. The terminal B+ ialso connected through a ohm resistor R44 and through a diode CR412 to the B-H-lead 506. The lead 506 is also connected through a diode CR413 and through 220 ohm resistor R45 to a lead 510. The lead 510 supplies, for example, l8-volts DC to the time delay circuit 34. A Zener diode CR414 is connected between the lead 510 and the B- lead 500, as is a capacitor C417. The Zener diode may be of the type designated IN4746. A 100 micro-microfarad capacitor C416 is connected between the B+ terminal and the B- lead 500. The diodes CR412 and CR413 may be of the type designated [N400].

The emitter of the PNP transistor Q49 in the time delay circuit 34 is connected to the lead 510, and the emitter is connected to a terminal 512. An unknown resistor RX is connected to the terminal 512 and to a second terminal 514, whereas an unknown capacitance CX is connected between the tenninal 514 and a terminal 516, the latter terminal being connected to the 8- lead 500. The reset lead 502 is connected through a diode CR410 and through a resistor R425 and a resistor R423 to the gate of a silicon controlled rectifier Q48, the anode of which is connected to theterminal 514. The base of the silicon controlled rectifier Q48 is connected to the B- lead 500, and the gate is connected to that lead througha resistor R424 which is shunted by a 0.01 microfarad capacitor C418. The resistor R425 is shunted by a 0.047 microfarad capacitor C48.

The terminal 514 is connected through a 1,000 ohm resistor R426 to the gate of a field effect transistor (FET) 0410. The FET 0410 may be of the type designated 2N3820. The gate is connected through a diode CR415 to the lead 500, and the source is connected directly to the lead 500. The diode CR415 may be of the type designated lN4l48. The drain electrode of the FET 0410 is connected to the junction of a 10 kilo-ohm resistor R427 and a 4,700 ohm resistor R440. The resistor R440 is connected to a potentiometer R428 which has a resistance of 10 kil-ohms, and which is connected to the lead 500. I

The movable arm of the potentiometer R428 is connected to the base of an NPN transistor Q411 which may be of the type designated MPS3704. The collector of the transistor (2411 is connected to a resistor R430 which, in turn, is connected to the base of a PNP transistor Q412 and through a resistor R429 to the lead 510. The transistor 0412 may be of the type designated MPS3703. The emitter of the transistor 0411 is connected through diodes CR416 and CR417 to the lead 500. The emitter of the transistor Q412, on the other hand, is connected through diodes CR419 and CR418 to the lead 510. The collector of the transistor Q412 is connected through a potentiometer R431 to a resistor R432. The resistor R432 is connected to the lead 500, and is shunted by a 0.01 microfarad capacitor C419.

The resistor R432 and capacitor C419 are connected to the gate of a silicon controlled rectifier 0413. The base of the silicon controlled rectifier 0413 is connected to the lead 500, and the anode is connected through a 22 kilo-ohm resistor R434 and through a 470 ohm resistor R433 to the lead 510. The resistor R434 is shunted by a .47 microfarad capacitor C420 which is connected through a 2,200 ohm resistor R440 to the base of a PNP transistor Q414. The transistor Q414 may be of the type designated MPS3703. The emitter of the transistor Q414 is connected through diodes CR421 and CR420 to the lead 510. The collector of the transistor Q414 is connected through a 1,000 ohm resistor R435 to the lead 500. The collector is also directly connected to the reset lead 502.

As the magnet 402 in FIG. 8 instantaneously-closes the reed switch 404, the resulting synchronizing marker at the terminal 406 fires the silicon controlled rectifier Q45 through the input circuit C47, R420 and R422. As the silicon controlled rectifier Q45 becomes conductive, current is provided by way of the diode CR411 and resistor R436 to provide base current for the transistor Q49 of the time delay circuit 34 to render that transistor conductive. As the transistor Q49 becomes conductive, the time measurement cycle is initiated, and the time delay circuit 34 is energized through the R/C timing circuit made up of the resistance RX and capacitance CX.

Assuming first that the values of RX and/or CX to be so large as to have a time constant significantly beyond the range of the instrument, the disc 400 in FIG. 8 rotates in the counterclockwise direction from the illustrated position to the E.O.T. position at the end of the scale, at which the magnet 402 instantaneously closes the switch 408 to produce an E.O.T. (end of time) marker at the terminal 410. Under these conditions, the light-emitting diode 30 is not fired during its angular travel around the scale, and when the E.O.T. marker appears at the terminal 410, a pulse is applied through the diode CR48 and CR49 and CR410 simultaneously to fire the silicon controlled rectifiers Q44, Q47 and Q48.

As the silicon controlled rectifier Q44 becomes conductive, the silicon controlled rectifier Q45 is rendered non-conductive through the path provided by the capacitor C414, so that the transistor Q49 becomes non-conductive thereby de-activating the R/C timing circuit RX/CX. As the siliconcontrolled rectifier Q47 becomes conductive, a high current pulseis provided to the light-emitting diode 30 for an interval determined by the time constant of the network C415 and R417, with the level of the initial current being determined by the value of the resistance R417. This time holding current, so that the silicon controlled rectifier Q47 is automatically turned off.

The shunting resistor R416 bleeds the charge from the capacitor C415, and the circuit is again ready for the light-emitting diode 30 to be fired at some subsequent point in time. The firing of the silicon controlled rectifier Q48, which occurs simultaneously with the turn-off of the transistor Q49, provides a discharge path for any residual energy which may be stored in the timing capacitor CX.

It should be noted that the operations described above occurred when the reset line 502 was raised to a positive potential by the closure of the E.O.T. reed switch 408 in FIG. 8, and that the control was initiated because no intermediate control occurred between the closure of the sync switch 404 and the closure of the E.O.T. switch 408 as the light-emitting diode 30 proceeded around the scale. However, if an output occurs from the time delay circuit 34 before the closure of the E.O.T. switch 408, the reset line 502 is raised to a positive potential, and the same events occur.

It should be also noted that the raising of the reset line 502 to the positive potential will only trigger the silicon controlled rectifier Q47 into conduction, along with the silicon controlled rectifiers Q44 and Q48, if the silicon controlled rectifier Q45 was previously fired by the synchronizing marker at the terminal 406.

Therefore, if at some point within the analog scale of FIG. 8, the voltage sensing trigger output of the delay circuit 34 were to activate the reset line 502, then the three silicon controlled rectifiers Q44, Q47 and Q48 would all be fired, as described above, to turn off the silicon controlled rectifier Q45, and for each revolution, the light-emitting diode 30 would flash at a particular angular position on the scale. Then, as the lightemitting diode reaches the E.O.T. point on the scale, the corresponding closure of the E.O.T. switch 408 by the magnet 402 would again raise the reset line 502 instantaneously to the positive voltage a second time during the cycle. This latter action attempts to trigger the silicon controlled rectifier Q48 without effect since no anode voltage is available for the device, and the silicon controlled rectifier Q44 is already conducting as a result of having previously been triggered. However, since the silicon controlled rectifier Q45 is turned off, and since its anode is at nearly positive voltage, the diode CR49, sensing the anode of the silicon controlled rectifier Q45 through the resistor R414 is at nearly the same potential with respect to its anode and cathode, and therefore is unable to conduct sufficient gating current to trigger the silicon controlled rectifier Q47. At 20 after the E.O.T. point, and as previously described, the synchronizing reed switch 404 is instantaneously closed again to trigger the silicon controlled rectifier Q45, thereby resetting the circuit and initiating the time measurement interval for the next cycle.

The circuit of the field effect transistor 0410 serves as a detector for the variations in analog input, as represented by changes in the values of RX and/or CX. The circuit of the silicon controlled rectifier Q413, and the associated transistors serve as a trigger circuit, in raising the voltage of the reset lead 502 to activate the light-emitting diode 30 in the described manner a predetermined time after the beginning of the time interval by the sync marker applied to the terminal 406,

the time being a function of the value of the resistor RX and/or capacitor CX. The particular detector and trigger circuits illustrated in FIG. 9, and in FIG. 10, make it possible to measure extremely wide ranges of analog information. In order to measure accurately wide ranges of resistance, capacitance and voltage, the detector input must exhibit extremely low capacitance and extremely high resistance. Specifically, the detector input should be below picofarads, and the resistance should be above 100 megohms. The unijunction transistor circuit described in conjunction with FIG. 4 as the resistance-capacitance detector cannot meet the aforesaid requirements. As a result, the circuit of FIG. 4 is capable of measuring resistance and capacitance in limited ranges. The use of the field effect transistor Q410 in the circuits of FIGS. 9 and 10, which exhibits the necessary characteristics referred to above, permits the ranges of measurement of the apparatus and system of the invention to be materially extended. For example, a commercial R-C meter constructed as shown in FIGS. 8 and 9 has the following ranges of measurement:

Referring again to FIG. 9, the field efi'ect transistor Q410 is of the type which is electrically conductive between its drain and source to a level which is dependent upon the level of positive voltage applied to its gate. TI-Iat is, with O-volts at the gate, the field effect transistor is fully conductive. As the gate voltage is raised, the effective direct current resistance between the drain and source electrodes increases. Since the input impedance of the field effect transistor is of the order of 10 ohms minimum, the device is effectively a voltage sensing detector which, for all practical purposes, draws no current. Therefore, the time constant of the circuit being measured is only determined by the values of RX and CK over ranges of several orders of magnitude. Until a voltage is present at the gate electrode of the field effect transistor 0410, the low drainsource resistance, operating as part of a voltage divider made up of the resistors R427, R440 and R428, effectively clamps the base of the transistor 0411 to ground to render the transistor Q41 1 non-conductive. With the transistor 0411 non-conductive, the base of the transistor Q412 is clamped to +l8-volts holding the transistor 0412 non-conductive.

As the transistor Q49 is rendered conductive, the timing circuit RX/CX is energized, and the voltage at the gate of the field effect transistor Q410 begins to rise in response to the charging of the capacitor CX. In corresponding manner, the conductivity of the transistors 0411 and 0412 increases eventually to the point where sufficient voltage appears across the gate-cathode junction of the silicon controlled rectifier 0413 to fire the silicon controlled rectifier. When sufi'icient gate voltage is present to tire the silicon controlled rectifier, the

anode drops instantly to nearly ground potential, providing a current spike through the capacitor C420 to drive the base of the transistor 0414 in the negative direction so that current flows in the transistor 0414. As the transistor Q414 becomes conductive, its collector voltage rises to nearly l8-volts to drive the reset line 502 positive in order to tire the silicon controlled rectifiers Q44 and 047, as described above.

In the circuit of FIG. 4 utilizing the unijunction transistor Q5, the energy stored in the timing capacitor C7 of that circuit was automatically dissipated by the firing of the unijunction transistor. In the circuit of FIG. 9, however, it is necessary to provide a discharge circuit for the capacitor CX, and this is achieved by the silicon controlled rectifier Q48.

It will be noted that the length of the are between the syncposition of the meter of FIG. 8 and the zero point on the scale is precisely 10 percent of the full scale are. For that reason, the pedestal time base provided by the timing circuit, as adjusted by the potentiometer R428 is exactly equal to one-tenth of full scale. Consider now that the range of interest to be measured is -10 microfarads of capacitance. By providing a built-in precision 1 microfarad capacitor as CX pedestal value, and by then providing a value of RX sufficient to provide a time lag after the sync marker which is exactly long enough to cause the light-emitting diode 30 to flash at the zero point of the scale, a time constant of precisely percent of full scale will then be established. Since the standard equation T CR is linear, and since the value of C is established at 1.0 microfarads, then for each additional microfarad of capacitance added as a shunt across the pedestal, the light-emitting diode 30 will be delayed in firing exactly 10 percent of the scale. Therefore, by means of appropriate selector switches, the time base pedestal may be duplicated in such a manner as to retain precise values of capacitance, or in reverse manner, resistance, which will then serve as 10 percent reference of the full scale value.

The time delay circuit 34 of FIG. 9 may be replaced by the circuit of FIG. 10 when an analog voltage input (AV) is to be measured rather than resistance and/or capacitance values. In the circuit of FIG. 10, like elements have been designated by the same numerals. In the circuit of FIG. 10, the anode of the silicon controlled rectifier Q45 of FIG. 9 is connected, as before, through the diode CR411 and through the resistor R436 to the base of a PNP transistor 0501. The transistor (2501 may be of the type designated MPS3703. The emitter of the transistor Q501 is connected to a resistor R501 which, in turn, is connected through a diode CR50ll to the positive terminal 13+ of the power supply. The diode CR501 may be of the type designated IN4001. The emitter of the transistor 0501 is also connected through a Zener diode CR502 to the B- lead 500. The Zener diode CR502 may be of the type designated IN4746. The Zener diode is shunted by a capacitor C501 which may have a value of 100 picofarads. The collector of the transistor 0501 is connected to a lead 600 which is connected through the diodes CR420 and CR421 to the emitter of the transistor Q4114, and through the diodes CR418 and CR419 to the emitter of the transistor Q4112.

The analog input voltage AV to be measured is applied to a terminal 604 which is connected to a resistor R503 of 1,000 ohms. The resistor R503 is connected to a 10 megohm resistor R504 and to a Zener diode CR504 which serves as an over-range protection means. The anode of the Zener diode CR504 is connected to the lead 500. The resistor R504 is connected through a 1,000 ohm resistor R506 to the gate of the field effect transistor Q410. The junction of the resistors R504 and R506 is connected to a 1 megohm resistor R505 which, in turn, is connected to the lead 500. The drain electrode of the field effect transistor 0410 is connected through a pedestal adjustment potentiometer R507 to a capacitor CX. The capacitor CX is connected to the lead 600. A relay K501 is provided to discharge the capacitor CX at the end of the cycle, and when the transistor Q501 is rendered nonconductive. The energizing coil of the relay K501 is connected between the leads 600 and 500, and is shunted by a diode CR600. The junction of the capacitor GK and potentiometer R507 is connected through a resistor R508 to the gate of the PNP transistor Q412.

In the circuit of FIG. 10, the field effect transistor 0410 is employed as a linear voltage controlled resistor. In the circuit of FIG. 10, the drain-to-source resistance of the field effect transistor, operating in conjunction with a value of capacitance CX, forms an R-C time constant network precisely the same as that used for resistance and capacitance measurement in the corresponding circuit of FIG. 9. In the circuit of FIG. 10, the available value of the drain-source resistance of the field effect transistor is taken when the voltage at the input of the divider, as applied to the terminal 604, is exactly 10 percent of full scale. That voltage is internally established as the scale pedestal. The value of the capacitor CX is then established so that the lightemitting diode 30 tires at the zero point on the scale. The sensitivity of the system of FIG. 10 is approximately 100,000 ohms per volt.

The invention provides, therefore, an improved instrument which is primarily a time measuring system, and by which any information which can be converted into short repetitive time increments can be directly measured on a linear scale of extreme length; this being achieved without lag, hunt or hysteresis. As an electronic measuring instrument for resistance, capacitance, or voltage, the measurement is performed, as described above, through the mechanism of an electrical R-C time constant network in which either R or C is the analog of the input information.

In general, the invention provides an improved instrument and system for the display of analog information on a readable scale, and for the instant display of a variety of alpha-numeric characters and symbols. In the system of the invention, a line synchronizing pulse is,

generated for each rotation of a movable disc or belt, and this pulse is used to initiate a time delay circuit. A light-emitting diode is energized a predetermined time thereafter, and this energizing of the light-emitting diode is repeated once for each cycle of rotation of the belt or disc, and at a rate which cannot be detected by human vision.

While particular embodiments of the invention have been shown and described, modifications may be made, and it is intended to cover all such modifications in the claims.

What is claimed is:

l. A stroboscopic display system and apparatus comprising: a frame member; a rotatable member mounted on said frame member; drive means for said rotatable member mounted on said frame member; a multiplicity of separate indicia formed on one of said members at spaced positions therealong; an electrically activated illuminating device mounted on the other of said members so that relative movement is produced between said indicia and said illuminating device as said drive means moves said rotatable member around a predetermined path; synchronizing means mounted on said rotatable member and on said frame member for producing a synchronizing pulse each time said rotatable member passes through a reference position, time delay control circuitry coupled to said synchronizing means and responsive to said synchronizing pulse to activate said illuminating device a particular time interval after the application of said synchronizing pulse to said time delay control circuitry; and analog input means connected to said time delay control circuitry for establishing said particular time interval in correspondence with a particular analog input.

2. The display system and apparatus defined in claim 1, in which said information carrying member comprises an endless belt, and in which said separate indicia are formed on said belt, and said illuminating device is mounted on said frame member, and in which said drive means causes said belt to move in a loop to cause said indicia repeatedly to pass over said illuminating device to be selectively illuminated thereby.

3. The system and apparatus defined in claim 2, in which said belt is an opaque member having transparent sections thereon representing said indicia.

4. The display system and apparatus defined in claim 2, in which said indicia on said belt comprises alpha-numeric characters and symbols.

5. The apparatus and system defined in claim 2, and in which said indicia on said belt comprises numbered graduations of a scale.

6. The stroboscopic display system and apparatus defined in claim 1, in which said time delay control circuitry includes a solid state silicon controlled rectifier controlled by said time delay circuit to activate said illuminating device.

7. The stroboscopic display system and apparatus defined in claim 1, in which said illuminating device comprises a light-emitting diode.

8. The stroboscopic display system and apparatus defined in claim 3, in which said indicia on said belt comprises alpha-numeric characters and symbols, and in which said belt includes further transparent sections respectively aligned with said characters and symbols, and further synchronizing means for generating character synchronizing pulses, as each character becomes aligned with said illuminating device, and in which said time delay control circuitry responds to said character synchronizing pulses to activate said illuminating device.

9. The stroboscopic display system and apparatus defined in claim 1, in which said time delay control circuitry includes a field effect transistor for detecting the analog input.

10. The stroboscopic display system and apparatus defined in claim 1, in which said rotatable member 

1. A stroboscopic display system and apparatus comprising: a frame member; a rotatable member mounted on said frame member; drive means for said rotatable member mounted on said frame member; a multiplicity of separate indicia formed on one of said members at spaced positions thErealong; an electrically activated illuminating device mounted on the other of said members so that relative movement is produced between said indicia and said illuminating device as said drive means moves said rotatable member around a predetermined path; synchronizing means mounted on said rotatable member and on said frame member for producing a synchronizing pulse each time said rotatable member passes through a reference position, time delay control circuitry coupled to said synchronizing means and responsive to said synchronizing pulse to activate said illuminating device a particular time interval after the application of said synchronizing pulse to said time delay control circuitry; and analog input means connected to said time delay control circuitry for establishing said particular time interval in correspondence with a particular analog input.
 2. The display system and apparatus defined in claim 1, in which said information carrying member comprises an endless belt, and in which said separate indicia are formed on said belt, and said illuminating device is mounted on said frame member, and in which said drive means causes said belt to move in a loop to cause said indicia repeatedly to pass over said illuminating device to be selectively illuminated thereby.
 3. The system and apparatus defined in claim 2, in which said belt is an opaque member having transparent sections thereon representing said indicia.
 4. The display system and apparatus defined in claim 2, in which said indicia on said belt comprises alpha-numeric characters and symbols.
 5. The apparatus and system defined in claim 2, and in which said indicia on said belt comprises numbered graduations of a scale.
 6. The stroboscopic display system and apparatus defined in claim 1, in which said time delay control circuitry includes a solid state silicon controlled rectifier controlled by said time delay circuit to activate said illuminating device.
 7. The stroboscopic display system and apparatus defined in claim 1, in which said illuminating device comprises a light-emitting diode.
 8. The stroboscopic display system and apparatus defined in claim 3, in which said indicia on said belt comprises alpha-numeric characters and symbols, and in which said belt includes further transparent sections respectively aligned with said characters and symbols, and further synchronizing means for generating character synchronizing pulses, as each character becomes aligned with said illuminating device, and in which said time delay control circuitry responds to said character synchronizing pulses to activate said illuminating device.
 9. The stroboscopic display system and apparatus defined in claim 1, in which said time delay control circuitry includes a field effect transistor for detecting the analog input.
 10. The stroboscopic display system and apparatus defined in claim 1, in which said rotatable member comprises a disc, and in which said separate indicia are mounted on said frame member around the periphery of said disc, and said illuminating device is mounted on said disc. 